搜索资源列表
VHDL IIC
- vhdL 模拟IIC
i2cEEPROM.rar
- 使用VHDL编写的操作EEPROM来控制iic的读写操作，很方便,Use VHDL to prepare the operation to control the IIC EEPROM read and write operation, it is convenient
I2C-Master-_-Slave-Core
- 用verilog 实现的 iic 总线编程，包括master，和slave的编程，很详细的iic总线编程-Iic-bus implemented using verilog programming, including the master, and slave programming, a very detailed iic-bus programming
EEPROM
- VHDL语言写的IIC实现EEPROM，很好的程序，已经用过，没有问题-Written in VHDL language IIC achieve EEPROM, good procedures are used, there is no problem
iic
- i2c ipcore,已经验证过可以使用-i2c ipcore
61EDA_D1037
- 实现IIC协议,非常适合初学FPGA者，是很好的参考代码。-EEPROM
IICbus
- 基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02
I2C
- ICC时序电路 读写程序图 VHDL语言编写了一个IIC控制程序-ICC
I2C
- 使用VHDL写的标准 IIC代码 标准的接口文件，具有三态功能-The use of a standard IIC write VHDL code for a standard interface file, with tri-state function
IIC_slave_core
- iic 总线规范和多个iic Verilog的设计论文,均为pdf-pdf of verilog iic
IIC
- IIC FPGA 代码 功能齐全 希望有需要的人下-IIC FPGA code is fully functional
IIC
- 用标准Verilog HDL 语言编写的IIC总线IP核，详细定义了时序及输入输出， 可以直接应用-Standard Verilog HDL language of the IIC bus IP core, a detailed definition of the timing and the input and output, can be applied directly
IIC
- 基于VERILOG HDL的IIC设计，比较基础，设计适合初学者-IIC INTERFCAE DESIGN
I2C
- I2C/IIC 总线接口驱动，在Altera和Xilinx的FPGA上跑过，Verilog编写，Craftor原创。V1.1。代码中还包含了24C02的读写测试程序，可直接用。-I2C/IIC Bus Driver, written in Verilog, v1.1. By Craftor
WBIIC
- 基于IIC Controller实现的对TP401视频解码芯片的工作模式配置。-IIC Controller implementation based on the TP401 video decoder chip mode configuration.
FPGA-IIC
- 利用VHDL实现延时程序 很不错的资料 适合学习CHDL-Delay procedure using VHDL implementation very good information for learning CHDL
i2c
- IIC核，可以直接仿真。对于IIC初学者非常有帮助。-IIC core, simulate directly。It s helpful for guys beginning study.
IIC
- 利用程序实现IIC总线读写数码管显示,并通过开发板验证-Program for IIC bus read and write using digital display
i2c_master_slave_core_latest.tar
- IIC IP核，可以直接集成在SOPC中的(⊙o⊙)哦-基于Quartus II 可直接集成到SOPC，自定义II C IP核
IIC-VHDL
- iic 总线在设计时要看你所使用的器件的传输或接收时序 只要会一个，其他的都一样 以下是我在一本书上看到的，感觉很不错，你看看就会用了 -as long as the will a the iic bus depends on the devices you use in the design of the transmission or reception of timing, other-like following, I saw in a book, I feel very g